{"record_type":"pith_number_record","schema_url":"https://pith.science/schemas/pith-number/v1.json","pith_number":"pith:2022:BMIYDIECUG67BUXSVNTBUJNJUA","short_pith_number":"pith:BMIYDIEC","schema_version":"1.0","canonical_sha256":"0b1181a082a1bdf0d2f2ab661a25a9a008061ac2daa6668646cca17cce575243","source":{"kind":"arxiv","id":"2207.06412","version":1},"attestation_state":"computed","paper":{"title":"RobustAnalog: Fast Variation-Aware Analog Circuit Design Via Multi-task RL","license":"http://arxiv.org/licenses/nonexclusive-distrib/1.0/","headline":"","cross_cats":["cs.AI","cs.LG"],"primary_cat":"cs.ET","authors_text":"David Pan, Hanrui Wang, Jiaqi Gu, Mingjie Liu, Nan Sun, Song Han, Wei Shi","submitted_at":"2022-07-13T04:06:32Z","abstract_excerpt":"Analog/mixed-signal circuit design is one of the most complex and time-consuming stages in the whole chip design process. Due to various process, voltage, and temperature (PVT) variations from chip manufacturing, analog circuits inevitably suffer from performance degradation. Although there has been plenty of work on automating analog circuit design under the typical condition, limited research has been done on exploring robust designs under real and unpredictable silicon variations. Automatic analog design against variations requires prohibitive computation and time costs. To address the chal"},"verification_status":{"content_addressed":true,"pith_receipt":true,"author_attested":false,"weak_author_claims":0,"strong_author_claims":0,"externally_anchored":false,"storage_verified":false,"citation_signatures":0,"replication_records":0,"graph_snapshot":true,"references_resolved":false,"formal_links_present":false},"canonical_record":{"source":{"id":"2207.06412","kind":"arxiv","version":1},"metadata":{"license":"http://arxiv.org/licenses/nonexclusive-distrib/1.0/","primary_cat":"cs.ET","submitted_at":"2022-07-13T04:06:32Z","cross_cats_sorted":["cs.AI","cs.LG"],"title_canon_sha256":"0f8c9aad505e14f3615905f7d8091e1d08825849d2ac9b9ee26d8c50c88e6165","abstract_canon_sha256":"bbc3191d9bd69be63716000f9b6cecdb69f856d17533191eb7f8350a3e20c485"},"schema_version":"1.0"},"receipt":{"kind":"pith_receipt","key_id":"pith-v1-2026-05","algorithm":"ed25519","signed_at":"2026-07-05T04:40:12.391889Z","signature_b64":"LvnqRzNDfM2cUTzvq7rRrBIpV9mtOcPoFMb1hbiI7EhCBCEGW7lA1VwNBJADx/+FjnAXbbcZuUF5xNQvbM1EDw==","signed_message":"canonical_sha256_bytes","builder_version":"pith-number-builder-2026-05-17-v1","receipt_version":"0.3","canonical_sha256":"0b1181a082a1bdf0d2f2ab661a25a9a008061ac2daa6668646cca17cce575243","last_reissued_at":"2026-07-05T04:40:12.391490Z","signature_status":"signed_v1","first_computed_at":"2026-07-05T04:40:12.391490Z","public_key_fingerprint":"8d4b5ee74e4693bcd1df2446408b0d54"},"graph_snapshot":{"paper":{"title":"RobustAnalog: Fast Variation-Aware Analog Circuit Design Via Multi-task RL","license":"http://arxiv.org/licenses/nonexclusive-distrib/1.0/","headline":"","cross_cats":["cs.AI","cs.LG"],"primary_cat":"cs.ET","authors_text":"David Pan, Hanrui Wang, Jiaqi Gu, Mingjie Liu, Nan Sun, Song Han, Wei Shi","submitted_at":"2022-07-13T04:06:32Z","abstract_excerpt":"Analog/mixed-signal circuit design is one of the most complex and time-consuming stages in the whole chip design process. Due to various process, voltage, and temperature (PVT) variations from chip manufacturing, analog circuits inevitably suffer from performance degradation. Although there has been plenty of work on automating analog circuit design under the typical condition, limited research has been done on exploring robust designs under real and unpredictable silicon variations. Automatic analog design against variations requires prohibitive computation and time costs. To address the chal"},"claims":{"count":0,"items":[],"snapshot_sha256":"258153158e38e3291e3d48162225fcdb2d5a3ed65a07baac614ab91432fd4f57"},"source":{"id":"2207.06412","kind":"arxiv","version":1},"verdict":{"id":null,"model_set":{},"created_at":null,"strongest_claim":"","one_line_summary":"","pipeline_version":null,"weakest_assumption":"","pith_extraction_headline":""},"integrity":{"clean":true,"summary":{"advisory":0,"critical":0,"by_detector":{},"informational":0},"endpoint":"/pith/2207.06412/integrity.json","findings":[],"available":true,"detectors_run":[],"snapshot_sha256":"c28c3603d3b5d939e8dc4c7e95fa8dfce3d595e45f758748cecf8e644a296938"},"references":{"count":0,"sample":[],"resolved_work":0,"snapshot_sha256":"258153158e38e3291e3d48162225fcdb2d5a3ed65a07baac614ab91432fd4f57","internal_anchors":0},"formal_canon":{"evidence_count":0,"snapshot_sha256":"258153158e38e3291e3d48162225fcdb2d5a3ed65a07baac614ab91432fd4f57"},"author_claims":{"count":0,"strong_count":0,"snapshot_sha256":"258153158e38e3291e3d48162225fcdb2d5a3ed65a07baac614ab91432fd4f57"},"builder_version":"pith-number-builder-2026-05-17-v1"},"aliases":[{"alias_kind":"arxiv","alias_value":"2207.06412","created_at":"2026-07-05T04:40:12.391548+00:00"},{"alias_kind":"arxiv_version","alias_value":"2207.06412v1","created_at":"2026-07-05T04:40:12.391548+00:00"},{"alias_kind":"doi","alias_value":"10.48550/arxiv.2207.06412","created_at":"2026-07-05T04:40:12.391548+00:00"},{"alias_kind":"pith_short_12","alias_value":"BMIYDIECUG67","created_at":"2026-07-05T04:40:12.391548+00:00"},{"alias_kind":"pith_short_16","alias_value":"BMIYDIECUG67BUXS","created_at":"2026-07-05T04:40:12.391548+00:00"},{"alias_kind":"pith_short_8","alias_value":"BMIYDIEC","created_at":"2026-07-05T04:40:12.391548+00:00"}],"events":[],"event_summary":{},"paper_claims":[],"inbound_citations":{"count":1,"internal_anchor_count":1,"sample":[{"citing_arxiv_id":"2507.17003","citing_title":"PPAAS: PVT and Pareto Aware Analog Sizing via Goal-conditioned Reinforcement Learning","ref_index":9,"is_internal_anchor":true}]},"formal_canon":{"evidence_count":0,"sample":[],"anchors":[]},"links":{"html":"https://pith.science/pith/BMIYDIECUG67BUXSVNTBUJNJUA","json":"https://pith.science/pith/BMIYDIECUG67BUXSVNTBUJNJUA.json","graph_json":"https://pith.science/api/pith-number/BMIYDIECUG67BUXSVNTBUJNJUA/graph.json","events_json":"https://pith.science/api/pith-number/BMIYDIECUG67BUXSVNTBUJNJUA/events.json","paper":"https://pith.science/paper/BMIYDIEC"},"agent_actions":{"view_html":"https://pith.science/pith/BMIYDIECUG67BUXSVNTBUJNJUA","download_json":"https://pith.science/pith/BMIYDIECUG67BUXSVNTBUJNJUA.json","view_paper":"https://pith.science/paper/BMIYDIEC","resolve_alias":"https://pith.science/api/pith-number/resolve?arxiv=2207.06412&json=true","fetch_graph":"https://pith.science/api/pith-number/BMIYDIECUG67BUXSVNTBUJNJUA/graph.json","fetch_events":"https://pith.science/api/pith-number/BMIYDIECUG67BUXSVNTBUJNJUA/events.json","actions":{"anchor_timestamp":"https://pith.science/pith/BMIYDIECUG67BUXSVNTBUJNJUA/action/timestamp_anchor","attest_storage":"https://pith.science/pith/BMIYDIECUG67BUXSVNTBUJNJUA/action/storage_attestation","attest_author":"https://pith.science/pith/BMIYDIECUG67BUXSVNTBUJNJUA/action/author_attestation","sign_citation":"https://pith.science/pith/BMIYDIECUG67BUXSVNTBUJNJUA/action/citation_signature","submit_replication":"https://pith.science/pith/BMIYDIECUG67BUXSVNTBUJNJUA/action/replication_record"}},"created_at":"2026-07-05T04:40:12.391548+00:00","updated_at":"2026-07-05T04:40:12.391548+00:00"}