{"record_type":"pith_number_record","schema_url":"https://pith.science/schemas/pith-number/v1.json","pith_number":"pith:2020:RQP66JXVXEZ7CLXJFLWDNQAGMP","short_pith_number":"pith:RQP66JXV","schema_version":"1.0","canonical_sha256":"8c1fef26f5b933f12ee92aec36c00663f367dda8980b8ba3063a97cc1ca180de","source":{"kind":"arxiv","id":"2001.03535","version":4},"attestation_state":"computed","paper":{"title":"AutoDNNchip: An Automated DNN Chip Predictor and Builder for Both FPGAs and ASICs","license":"http://arxiv.org/licenses/nonexclusive-distrib/1.0/","headline":"","cross_cats":["cs.CV","eess.SP"],"primary_cat":"cs.DC","authors_text":"Chaojian Li, Cong Hao, Deming Chen, Pengfei Xu, Xiaofan Zhang, Yang Zhao, Yingyan Lin, Yongan Zhang, Yue Wang, Zetong Guan","submitted_at":"2020-01-06T05:32:15Z","abstract_excerpt":"Recent breakthroughs in Deep Neural Networks (DNNs) have fueled a growing demand for DNN chips. However, designing DNN chips is non-trivial because: (1) mainstream DNNs have millions of parameters and operations; (2) the large design space due to the numerous design choices of dataflows, processing elements, memory hierarchy, etc.; and (3) an algorithm/hardware co-design is needed to allow the same DNN functionality to have a different decomposition, which would require different hardware IPs to meet the application specifications. Therefore, DNN chips take a long time to design and require cr"},"verification_status":{"content_addressed":true,"pith_receipt":true,"author_attested":false,"weak_author_claims":0,"strong_author_claims":0,"externally_anchored":false,"storage_verified":false,"citation_signatures":0,"replication_records":0,"graph_snapshot":true,"references_resolved":false,"formal_links_present":false},"canonical_record":{"source":{"id":"2001.03535","kind":"arxiv","version":4},"metadata":{"license":"http://arxiv.org/licenses/nonexclusive-distrib/1.0/","primary_cat":"cs.DC","submitted_at":"2020-01-06T05:32:15Z","cross_cats_sorted":["cs.CV","eess.SP"],"title_canon_sha256":"ad8e3f7fe4c3897a91c16771a57ae2da2b6c479fec765d501fd40cae1de2f3d4","abstract_canon_sha256":"23349b31b247f3abb20c80b7dfed2c606ecef613848b5d74596cbbd727c339a5"},"schema_version":"1.0"},"receipt":{"kind":"pith_receipt","key_id":"pith-v1-2026-05","algorithm":"ed25519","signed_at":"2026-07-05T01:09:19.800088Z","signature_b64":"DdS8D9N5e5KHnyH4CZdtb+7Z/EHgH6BFhj0UqymvnQFIXCsCNj99EqZ7nuNn380+uyxugKZrswDa0ZJRyfg3DQ==","signed_message":"canonical_sha256_bytes","builder_version":"pith-number-builder-2026-05-17-v1","receipt_version":"0.3","canonical_sha256":"8c1fef26f5b933f12ee92aec36c00663f367dda8980b8ba3063a97cc1ca180de","last_reissued_at":"2026-07-05T01:09:19.799630Z","signature_status":"signed_v1","first_computed_at":"2026-07-05T01:09:19.799630Z","public_key_fingerprint":"8d4b5ee74e4693bcd1df2446408b0d54"},"graph_snapshot":{"paper":{"title":"AutoDNNchip: An Automated DNN Chip Predictor and Builder for Both FPGAs and ASICs","license":"http://arxiv.org/licenses/nonexclusive-distrib/1.0/","headline":"","cross_cats":["cs.CV","eess.SP"],"primary_cat":"cs.DC","authors_text":"Chaojian Li, Cong Hao, Deming Chen, Pengfei Xu, Xiaofan Zhang, Yang Zhao, Yingyan Lin, Yongan Zhang, Yue Wang, Zetong Guan","submitted_at":"2020-01-06T05:32:15Z","abstract_excerpt":"Recent breakthroughs in Deep Neural Networks (DNNs) have fueled a growing demand for DNN chips. However, designing DNN chips is non-trivial because: (1) mainstream DNNs have millions of parameters and operations; (2) the large design space due to the numerous design choices of dataflows, processing elements, memory hierarchy, etc.; and (3) an algorithm/hardware co-design is needed to allow the same DNN functionality to have a different decomposition, which would require different hardware IPs to meet the application specifications. Therefore, DNN chips take a long time to design and require cr"},"claims":{"count":0,"items":[],"snapshot_sha256":"258153158e38e3291e3d48162225fcdb2d5a3ed65a07baac614ab91432fd4f57"},"source":{"id":"2001.03535","kind":"arxiv","version":4},"verdict":{"id":null,"model_set":{},"created_at":null,"strongest_claim":"","one_line_summary":"","pipeline_version":null,"weakest_assumption":"","pith_extraction_headline":""},"integrity":{"clean":true,"summary":{"advisory":0,"critical":0,"by_detector":{},"informational":0},"endpoint":"/pith/2001.03535/integrity.json","findings":[],"available":true,"detectors_run":[],"snapshot_sha256":"c28c3603d3b5d939e8dc4c7e95fa8dfce3d595e45f758748cecf8e644a296938"},"references":{"count":0,"sample":[],"resolved_work":0,"snapshot_sha256":"258153158e38e3291e3d48162225fcdb2d5a3ed65a07baac614ab91432fd4f57","internal_anchors":0},"formal_canon":{"evidence_count":0,"snapshot_sha256":"258153158e38e3291e3d48162225fcdb2d5a3ed65a07baac614ab91432fd4f57"},"author_claims":{"count":0,"strong_count":0,"snapshot_sha256":"258153158e38e3291e3d48162225fcdb2d5a3ed65a07baac614ab91432fd4f57"},"builder_version":"pith-number-builder-2026-05-17-v1"},"aliases":[{"alias_kind":"arxiv","alias_value":"2001.03535","created_at":"2026-07-05T01:09:19.799686+00:00"},{"alias_kind":"arxiv_version","alias_value":"2001.03535v4","created_at":"2026-07-05T01:09:19.799686+00:00"},{"alias_kind":"doi","alias_value":"10.48550/arxiv.2001.03535","created_at":"2026-07-05T01:09:19.799686+00:00"},{"alias_kind":"pith_short_12","alias_value":"RQP66JXVXEZ7","created_at":"2026-07-05T01:09:19.799686+00:00"},{"alias_kind":"pith_short_16","alias_value":"RQP66JXVXEZ7CLXJ","created_at":"2026-07-05T01:09:19.799686+00:00"},{"alias_kind":"pith_short_8","alias_value":"RQP66JXV","created_at":"2026-07-05T01:09:19.799686+00:00"}],"events":[],"event_summary":{},"paper_claims":[],"inbound_citations":{"count":1,"internal_anchor_count":1,"sample":[{"citing_arxiv_id":"2506.13905","citing_title":"Spec2RTL-Agent: Automated Hardware Code Generation from Complex Specifications Using LLM Agent Systems","ref_index":2020,"is_internal_anchor":true}]},"formal_canon":{"evidence_count":0,"sample":[],"anchors":[]},"links":{"html":"https://pith.science/pith/RQP66JXVXEZ7CLXJFLWDNQAGMP","json":"https://pith.science/pith/RQP66JXVXEZ7CLXJFLWDNQAGMP.json","graph_json":"https://pith.science/api/pith-number/RQP66JXVXEZ7CLXJFLWDNQAGMP/graph.json","events_json":"https://pith.science/api/pith-number/RQP66JXVXEZ7CLXJFLWDNQAGMP/events.json","paper":"https://pith.science/paper/RQP66JXV"},"agent_actions":{"view_html":"https://pith.science/pith/RQP66JXVXEZ7CLXJFLWDNQAGMP","download_json":"https://pith.science/pith/RQP66JXVXEZ7CLXJFLWDNQAGMP.json","view_paper":"https://pith.science/paper/RQP66JXV","resolve_alias":"https://pith.science/api/pith-number/resolve?arxiv=2001.03535&json=true","fetch_graph":"https://pith.science/api/pith-number/RQP66JXVXEZ7CLXJFLWDNQAGMP/graph.json","fetch_events":"https://pith.science/api/pith-number/RQP66JXVXEZ7CLXJFLWDNQAGMP/events.json","actions":{"anchor_timestamp":"https://pith.science/pith/RQP66JXVXEZ7CLXJFLWDNQAGMP/action/timestamp_anchor","attest_storage":"https://pith.science/pith/RQP66JXVXEZ7CLXJFLWDNQAGMP/action/storage_attestation","attest_author":"https://pith.science/pith/RQP66JXVXEZ7CLXJFLWDNQAGMP/action/author_attestation","sign_citation":"https://pith.science/pith/RQP66JXVXEZ7CLXJFLWDNQAGMP/action/citation_signature","submit_replication":"https://pith.science/pith/RQP66JXVXEZ7CLXJFLWDNQAGMP/action/replication_record"}},"created_at":"2026-07-05T01:09:19.799686+00:00","updated_at":"2026-07-05T01:09:19.799686+00:00"}