{"record_type":"pith_number_record","schema_url":"https://pith.science/schemas/pith-number/v1.json","pith_number":"pith:2021:RUN4M25VBUJ5GMS4IY23C4B4GV","short_pith_number":"pith:RUN4M25V","schema_version":"1.0","canonical_sha256":"8d1bc66bb50d13d3325c4635b1703c354b0d591d1d012b70e36b159690bc06e6","source":{"kind":"arxiv","id":"2110.11521","version":1},"attestation_state":"computed","paper":{"title":"High Level Synthesis Implementation of a Three-dimensional Systolic Array Architecture for Matrix Multiplications on Intel Stratix 10 FPGAs","license":"http://arxiv.org/licenses/nonexclusive-distrib/1.0/","headline":"","cross_cats":[],"primary_cat":"cs.AR","authors_text":"Christian Plessl, Paolo Gorlani","submitted_at":"2021-10-17T18:34:46Z","abstract_excerpt":"In this paper, we consider the HLS implementation of a three-dimensional systolic array architecture for matrix multiplication that targets specific characteristics of Intel Stratix 10 FPGAs in order to produce designs that achieve a high floating-point throughput using most of the DSPs at high frequencies in a way that avoids the congestion of the routing fabric. The investigated three-dimensional systolic array architecture is able to produce hardware designs that use 99% of the available DSPs with maximum frequencies that let us achieve performances above 3 TFLOPS."},"verification_status":{"content_addressed":true,"pith_receipt":true,"author_attested":false,"weak_author_claims":0,"strong_author_claims":0,"externally_anchored":false,"storage_verified":false,"citation_signatures":0,"replication_records":0,"graph_snapshot":true,"references_resolved":false,"formal_links_present":false},"canonical_record":{"source":{"id":"2110.11521","kind":"arxiv","version":1},"metadata":{"license":"http://arxiv.org/licenses/nonexclusive-distrib/1.0/","primary_cat":"cs.AR","submitted_at":"2021-10-17T18:34:46Z","cross_cats_sorted":[],"title_canon_sha256":"39330d3096030e19bfdb919ac1162bc8739409312d2d56d5701f7ede14a1207f","abstract_canon_sha256":"dcd74c9bab468630627d5b0cc58c131c30cc234ffa69f9d0fb591b433203e4d3"},"schema_version":"1.0"},"receipt":{"kind":"pith_receipt","key_id":"pith-v1-2026-05","algorithm":"ed25519","signed_at":"2026-07-05T03:24:48.179464Z","signature_b64":"hiKiptr1xKnZLuWmND/r7RARoMJspeh13gc77p/wpTG4pmSkfR9n+Ho6I/Vu19KC9wppiXFi0Wjv2obvs8SYDg==","signed_message":"canonical_sha256_bytes","builder_version":"pith-number-builder-2026-05-17-v1","receipt_version":"0.3","canonical_sha256":"8d1bc66bb50d13d3325c4635b1703c354b0d591d1d012b70e36b159690bc06e6","last_reissued_at":"2026-07-05T03:24:48.179034Z","signature_status":"signed_v1","first_computed_at":"2026-07-05T03:24:48.179034Z","public_key_fingerprint":"8d4b5ee74e4693bcd1df2446408b0d54"},"graph_snapshot":{"paper":{"title":"High Level Synthesis Implementation of a Three-dimensional Systolic Array Architecture for Matrix Multiplications on Intel Stratix 10 FPGAs","license":"http://arxiv.org/licenses/nonexclusive-distrib/1.0/","headline":"","cross_cats":[],"primary_cat":"cs.AR","authors_text":"Christian Plessl, Paolo Gorlani","submitted_at":"2021-10-17T18:34:46Z","abstract_excerpt":"In this paper, we consider the HLS implementation of a three-dimensional systolic array architecture for matrix multiplication that targets specific characteristics of Intel Stratix 10 FPGAs in order to produce designs that achieve a high floating-point throughput using most of the DSPs at high frequencies in a way that avoids the congestion of the routing fabric. The investigated three-dimensional systolic array architecture is able to produce hardware designs that use 99% of the available DSPs with maximum frequencies that let us achieve performances above 3 TFLOPS."},"claims":{"count":0,"items":[],"snapshot_sha256":"258153158e38e3291e3d48162225fcdb2d5a3ed65a07baac614ab91432fd4f57"},"source":{"id":"2110.11521","kind":"arxiv","version":1},"verdict":{"id":null,"model_set":{},"created_at":null,"strongest_claim":"","one_line_summary":"","pipeline_version":null,"weakest_assumption":"","pith_extraction_headline":""},"integrity":{"clean":true,"summary":{"advisory":0,"critical":0,"by_detector":{},"informational":0},"endpoint":"/pith/2110.11521/integrity.json","findings":[],"available":true,"detectors_run":[],"snapshot_sha256":"c28c3603d3b5d939e8dc4c7e95fa8dfce3d595e45f758748cecf8e644a296938"},"references":{"count":0,"sample":[],"resolved_work":0,"snapshot_sha256":"258153158e38e3291e3d48162225fcdb2d5a3ed65a07baac614ab91432fd4f57","internal_anchors":0},"formal_canon":{"evidence_count":0,"snapshot_sha256":"258153158e38e3291e3d48162225fcdb2d5a3ed65a07baac614ab91432fd4f57"},"author_claims":{"count":0,"strong_count":0,"snapshot_sha256":"258153158e38e3291e3d48162225fcdb2d5a3ed65a07baac614ab91432fd4f57"},"builder_version":"pith-number-builder-2026-05-17-v1"},"aliases":[{"alias_kind":"arxiv","alias_value":"2110.11521","created_at":"2026-07-05T03:24:48.179099+00:00"},{"alias_kind":"arxiv_version","alias_value":"2110.11521v1","created_at":"2026-07-05T03:24:48.179099+00:00"},{"alias_kind":"doi","alias_value":"10.48550/arxiv.2110.11521","created_at":"2026-07-05T03:24:48.179099+00:00"},{"alias_kind":"pith_short_12","alias_value":"RUN4M25VBUJ5","created_at":"2026-07-05T03:24:48.179099+00:00"},{"alias_kind":"pith_short_16","alias_value":"RUN4M25VBUJ5GMS4","created_at":"2026-07-05T03:24:48.179099+00:00"},{"alias_kind":"pith_short_8","alias_value":"RUN4M25V","created_at":"2026-07-05T03:24:48.179099+00:00"}],"events":[],"event_summary":{},"paper_claims":[],"inbound_citations":{"count":0,"internal_anchor_count":0,"sample":[]},"formal_canon":{"evidence_count":0,"sample":[],"anchors":[]},"links":{"html":"https://pith.science/pith/RUN4M25VBUJ5GMS4IY23C4B4GV","json":"https://pith.science/pith/RUN4M25VBUJ5GMS4IY23C4B4GV.json","graph_json":"https://pith.science/api/pith-number/RUN4M25VBUJ5GMS4IY23C4B4GV/graph.json","events_json":"https://pith.science/api/pith-number/RUN4M25VBUJ5GMS4IY23C4B4GV/events.json","paper":"https://pith.science/paper/RUN4M25V"},"agent_actions":{"view_html":"https://pith.science/pith/RUN4M25VBUJ5GMS4IY23C4B4GV","download_json":"https://pith.science/pith/RUN4M25VBUJ5GMS4IY23C4B4GV.json","view_paper":"https://pith.science/paper/RUN4M25V","resolve_alias":"https://pith.science/api/pith-number/resolve?arxiv=2110.11521&json=true","fetch_graph":"https://pith.science/api/pith-number/RUN4M25VBUJ5GMS4IY23C4B4GV/graph.json","fetch_events":"https://pith.science/api/pith-number/RUN4M25VBUJ5GMS4IY23C4B4GV/events.json","actions":{"anchor_timestamp":"https://pith.science/pith/RUN4M25VBUJ5GMS4IY23C4B4GV/action/timestamp_anchor","attest_storage":"https://pith.science/pith/RUN4M25VBUJ5GMS4IY23C4B4GV/action/storage_attestation","attest_author":"https://pith.science/pith/RUN4M25VBUJ5GMS4IY23C4B4GV/action/author_attestation","sign_citation":"https://pith.science/pith/RUN4M25VBUJ5GMS4IY23C4B4GV/action/citation_signature","submit_replication":"https://pith.science/pith/RUN4M25VBUJ5GMS4IY23C4B4GV/action/replication_record"}},"created_at":"2026-07-05T03:24:48.179099+00:00","updated_at":"2026-07-05T03:24:48.179099+00:00"}