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Ingrid Verbauwhede

Identifiers

  • name variant Ingrid Verbauwhede 0.60 · backfill

Papers (19)

  1. Leuvenshtein: Efficient FHE-based Edit Distance Computation with Single Bootstrap per Cell cs.CR · 2025 · author #5
  2. Writing a Good Security Paper for ISSCC (2025) cs.CR · 2025 · author #9
  3. Rudraksh: A compact and lightweight post-quantum key-encapsulation mechanism cs.CR · 2025 · author #5
  4. Masking Gaussian Elimination at Arbitrary Order, with Application to Multivariate- and Code-Based PQC cs.CR · 2024 · author #6
  5. Scabbard: An Exploratory Study on Hardware Aware Design Choices of Learning with Rounding-based Key Encapsulation Mechanisms cs.CR · 2024 · author #6
  6. Carry Your Fault: A Fault Propagation Attack on Side-Channel Protected LWE-based KEM cs.CR · 2024 · author #6
  7. On the Masking-Friendly Designs for Post-Quantum Cryptography cs.CR · 2023 · author #3
  8. A practical key-recovery attack on LWE-based key-encapsulation mechanism schemes using Rowhammer cs.CR · 2023 · author #5
  9. A 334$\mu$W 0.158mm$^2$ ASIC for Post-Quantum Key-Encapsulation Mechanism Saber with Low-latency Striding Toom-Cook Multiplication Authors Version cs.CR · 2023 · author #6
  10. Neural Network Quantisation for Faster Homomorphic Encryption cs.CR · 2023 · author #5
  11. Optimizing Linear Correctors: A Tight Output Min-Entropy Bound and Selection Technique cs.CR · 2023 · author #2
  12. Mining CryptoNight-Haven on the Varium C1100 Blockchain Accelerator Card cs.CR · 2022 · author #4
  13. FPT: a Fixed-Point Accelerator for Torus Fully Homomorphic Encryption cs.CR · 2022 · author #4
  14. BASALISC: Programmable Hardware Accelerator for BGV Fully Homomorphic Encryption cs.CR · 2022 · author #9
  15. A 333.9uW 0.158mm$^2$ Saber Learning with Rounding based Post-Quantum Crypto Accelerator cs.CR · 2022 · author #6
  16. Advanced profiling for probabilistic Prime+Probe attacks and covert channels in ScatterCache cs.CR · 2019 · author #2
  17. A survey of Hardware-based Control Flow Integrity (CFI) cs.CR · 2017 · author #2
  18. A VLSI Design Flow for Secure Side-Channel Attack Resistant ICs cs.AR · 2007 · author #2
  19. Design Method for Constant Power Consumption of Differential Logic Circuits cs.CR · 2007 · author #2

Mentions

  • 2508.14568 #5 · arxiv_oai · confidence 0.70 Ingrid Verbauwhede
  • 2505.12700 #9 · arxiv_oai · confidence 0.70 Ingrid Verbauwhede
  • 2411.00067 #6 · arxiv_oai · confidence 0.70 Ingrid Verbauwhede
  • 2501.13799 #5 · arxiv_oai · confidence 0.70 Ingrid Verbauwhede
  • 2409.09481 #6 · arxiv_oai · confidence 0.70 Ingrid Verbauwhede
  • 2304.05306 #2 · arxiv_oai · confidence 0.70 Ingrid Verbauwhede
  • 2401.14098 #6 · arxiv_oai · confidence 0.70 Ingrid Verbauwhede
  • 2311.08040 #3 · arxiv_oai · confidence 0.70 Ingrid Verbauwhede
  • 2311.08027 #5 · arxiv_oai · confidence 0.70 Ingrid Verbauwhede
  • 2211.13696 #4 · arxiv_oai · confidence 0.70 Ingrid Verbauwhede
  • 2304.09490 #5 · arxiv_oai · confidence 0.70 Ingrid Verbauwhede
  • 2205.14017 #9 · arxiv_oai · confidence 0.70 Ingrid Verbauwhede
  • 2305.10368 #6 · arxiv_oai · confidence 0.70 Ingrid Verbauwhede
  • 2212.05033 #4 · arxiv_oai · confidence 0.70 Ingrid Verbauwhede
  • 2201.07375 #6 · arxiv_oai · confidence 0.70 Ingrid Verbauwhede
  • 1908.03383 #2 · arxiv_oai · confidence 0.70 Ingrid Verbauwhede
  • 1706.07257 #2 · arxiv_oai · confidence 0.70 Ingrid Verbauwhede
  • 0710.4806 #2 · arxiv_oai · confidence 0.70 Ingrid Verbauwhede
  • 0710.4756 #2 · arxiv_oai · confidence 0.70 Ingrid Verbauwhede
  • 0710.4806 #2 · backfill · confidence 0.70 Ingrid Verbauwhede
  • 0710.4756 #2 · backfill · confidence 0.70 Ingrid Verbauwhede

Frequent Coauthors