Nianhong Liu

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Papers (2)

1. FPGA Implementations of 3D-SIMD Processor Architecture for Deep Neural Networks Using Relative Indexed Compressed Sparse Filter Encoding Format and Stacked Filters Stationary Flow cs.CV · 2018 · author #2
2. Stacked Filters Stationary Flow For Hardware-Oriented Acceleration Of Deep Convolutional Neural Networks cs.CV · 2018 · author #2

Mentions

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Frequent Coauthors

• Sheng Zhang 2 shared papers
• Yuechao Gao 2 shared papers