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Thomas Eisenbarth

Identifiers

  • name variant Thomas Eisenbarth 0.60 · backfill

Papers (14)

  1. uGen: An Agentic Framework for Generating Microarchitectural Attack PoCs cs.CR · 2026 · author #4
  2. Code-Centric Detection of Vulnerability-Fixing Commits: A Unified Benchmark and Empirical Study cs.SE · 2026 · author #5
  3. TrEEStealer: Stealing Decision Trees via Enclave Side Channels cs.CR · 2026 · author #7
  4. DRAMatic Speedup: Accelerating HE Operations on a Processing-in-Memory System cs.CR · 2026 · author #5
  5. Zebrafix: Mitigating Memory-Centric Side-Channel Leakage via Interleaving cs.CR · 2025 · author #3
  6. FortuneTeller: Predicting Microarchitectural Attacks via Unsupervised Deep Learning cs.CR · 2019 · author #3
  7. RELOAD+REFRESH: Abusing Cache Replacement Policies to Perform Stealthy Cache Attacks cs.CR · 2019 · author #4
  8. SPOILER: Speculative Load Hazards Boost Rowhammer and Cache Attacks cs.CR · 2019 · author #6
  9. MemJam: A False Dependency Attack against Constant-Time Crypto Implementations cs.CR · 2017 · author #2
  10. CacheShield: Protecting Legacy Processes Against Cache Attacks cs.CR · 2017 · author #4
  11. Did we learn from LLC Side Channel Attacks? A Cache Leakage Detection Tool for Crypto Libraries cs.CR · 2017 · author #6
  12. PerfWeb: How to Violate Web Privacy with Hardware Performance Events cs.CR · 2017 · author #3
  13. AutoLock: Why Cache Attacks on ARM Are Harder Than You Think cs.CR · 2017 · author #6
  14. CacheZoom: How SGX Amplifies The Power of Cache Attacks cs.CR · 2017 · author #3

Mentions

  • 2605.15503 #4 · arxiv_oai · confidence 0.70 Thomas Eisenbarth

Frequent Coauthors