A ReRAM computing-in-memory accelerator using thermal device noise for stochastic binarization removes ADCs and explicit activation circuits, reporting 142% higher TOPS/W and 58% lower energy with 96.7% MNIST accuracy.
Regularized Binary Network Training
1 Pith paper cite this work. Polarity classification is still indexing.
abstract
There is a significant performance gap between Binary Neural Networks (BNNs) and floating point Deep Neural Networks (DNNs). We propose to improve the binary training method, by introducing a new regularization function that encourages training weights around binary values. In addition, we add trainable scaling factors to our regularization functions. Additionally, an improved approximation of the derivative of the sign activation function in the backward computation. These modifications are based on linear operations that are easily implementable into the binary training framework. Experimental results on ImageNet shows our method outperforms the traditional BNN method and XNOR-net.
citation-role summary
citation-polarity summary
fields
cs.AR 1years
2024 1verdicts
CONDITIONAL 1roles
background 1polarities
unclear 1representative citing papers
citing papers explorer
-
A Fully Hardware Implemented Accelerator Design in ReRAM Analog Computing without ADCs
A ReRAM computing-in-memory accelerator using thermal device noise for stochastic binarization removes ADCs and explicit activation circuits, reporting 142% higher TOPS/W and 58% lower energy with 96.7% MNIST accuracy.