A sensor-triggered recovery framework lets a partially damaged RISC-V soft processor on an FPGA keep running by recompiling around failed ALU units or relocating via partial reconfiguration.
Fault recovery from multi-tenant fpga voltage attacks,
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Logical Maneuvers: Detecting and Mitigating Adversarial Hardware Faults in Space
A sensor-triggered recovery framework lets a partially damaged RISC-V soft processor on an FPGA keep running by recompiling around failed ALU units or relocating via partial reconfiguration.