AutoINV generates helper assertions from HLS high-level features and uses iterative proving to select effective ones, achieving up to 6.05x speedup (2.23x average) over vanilla model checking on benchmarks.
Goldmine: Automatic assertion generation using data mining and static analysis,
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UNVERDICTED 2representative citing papers
SVA Generator improves semantic correctness of LLM-generated SystemVerilog Assertions by 22.7 percentage points on average for deeper properties using AST-grounded constraint injection and depth-stratified formal equivalence checking.
citing papers explorer
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AutoINV: Automated Invariant Generation Framework for Formal Verification on High-Level Synthesis Designs
AutoINV generates helper assertions from HLS high-level features and uses iterative proving to select effective ones, achieving up to 6.05x speedup (2.23x average) over vanilla model checking on benchmarks.
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Automated SVA Generation with LLMs
SVA Generator improves semantic correctness of LLM-generated SystemVerilog Assertions by 22.7 percentage points on average for deeper properties using AST-grounded constraint injection and depth-stratified formal equivalence checking.