Union-find decoder for surface code achieves finite threshold under circuit-level stochastic errors with quasi-polylog parallel runtime bound.
Learning to decode the surface code with a recurrent, transformer-based neural network,
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Presents a coset ensemble decoder with algorithm-hardware co-design that claims better accuracy-latency trade-off and lower FPGA resource use than MWPM and UF baselines under depolarizing noise.
An FPGA-accelerated GNN decoder for surface-code quantum error correction delivers sub-1us latency and lower error rates than state-of-the-art approaches for code distances up to 7.
Soft decoding with analog measurement data raises repetition-code thresholds by 25% and reduces error rates up to 30x on superconducting qubits, with one byte per shot sufficient for near-optimal performance.
A two-level decoder scheduling framework reduces classical processing requirements for quantum error correction by 10-40% on fault-tolerant benchmarks by managing bursty workloads as shared resources.
citing papers explorer
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Proof of a finite threshold for the union-find decoder
Union-find decoder for surface code achieves finite threshold under circuit-level stochastic errors with quasi-polylog parallel runtime bound.
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Low Latency GNN Accelerator for Quantum Error Correction
An FPGA-accelerated GNN decoder for surface-code quantum error correction delivers sub-1us latency and lower error rates than state-of-the-art approaches for code distances up to 7.