Component-level DVFS on NPUs, with pipeline refactoring and compiler-coordinated voltage/frequency selection, cuts LLM-serving energy by 25.8–35.2% at sub-4% area overhead in simulation.
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Enabling Spatially Fine-Grained DVFS in Neural Processing Units for Energy-Efficient LLM Serving
Component-level DVFS on NPUs, with pipeline refactoring and compiler-coordinated voltage/frequency selection, cuts LLM-serving energy by 25.8–35.2% at sub-4% area overhead in simulation.