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Thilini Kaushalya Bandara, Dhananjaya Wijerathne, Tulika Mitra, Li-Shiuan Peh · 2022 · Zenodo (CERN European Organization for Nuclear Research) · DOI 10.5281/zenodo.5848404

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representative citing papers

Re-thinking Memory-Bound Limitations in CGRAs

cs.AR · 2025-08-13 · conditional · novelty 6.0

Adding a cache hierarchy, CGRA-specific runahead prefetching, and per-PE cache reconfiguration allows CGRAs to process irregular memory-access kernels at near-ideal speed with 1.27% of the storage.

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  • Re-thinking Memory-Bound Limitations in CGRAs cs.AR · 2025-08-13 · conditional · none · ref 2

    Adding a cache hierarchy, CGRA-specific runahead prefetching, and per-PE cache reconfiguration allows CGRAs to process irregular memory-access kernels at near-ideal speed with 1.27% of the storage.