LEDRO uses an LLM to propose refined parameter ranges, then runs TuRBO inside those ranges, beating full-space Bayesian optimization on a 22-topology, 4-node op-amp benchmark.
”An efficient bayesian optimization approach for automated optimization of analog circuits.” IEEE Transactions on Circuits and Systems I: Regular Papers 65.6 (2017): 1954-1967
1 Pith paper cite this work. Polarity classification is still indexing.
1
Pith paper citing it
fields
cs.LG 1years
2024 1verdicts
CONDITIONAL 1representative citing papers
citing papers explorer
-
LEDRO: LLM-Enhanced Design Space Reduction and Optimization for Analog Circuits
LEDRO uses an LLM to propose refined parameter ranges, then runs TuRBO inside those ranges, beating full-space Bayesian optimization on a 22-topology, 4-node op-amp benchmark.