Caching and graph-state compression of repeated quantum sub-circuits yields about 10^5 lower transpilation latency in adder benchmarks, supporting just-in-time execution of large quantum programs.
Hybrid quantum-classical computing architectures
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Quantum Circuit Caches and Compressors for Low Latency, High Throughput Computing
Caching and graph-state compression of repeated quantum sub-circuits yields about 10^5 lower transpilation latency in adder benchmarks, supporting just-in-time execution of large quantum programs.