Shaping the STT pulse reduces write error rates and improves robustness in field-free SOT+STT switching of imperfect top-pinned SOT-MRAM devices.
Ultra-Fast and High-Reliability SOT-MRAM: From Cache Replacement to Normally-Off Computing
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Pulse Shaping to Mitigate the Impact of Device Imperfections in Field-Free Switching Using Combined Spin-Orbit and Spin-Transfer Torques
Shaping the STT pulse reduces write error rates and improves robustness in field-free SOT+STT switching of imperfect top-pinned SOT-MRAM devices.