An asymmetric LSMO/PZT/LTMO multiferroic tunnel junction exhibits combined TMR, TER, and rectification effects that yield four resistive states under opposite biases, enabling co-located quaternary memory and logic functions in device arrays.
Ferroelectric Control of Interface Spin Filtering in Multiferroic Tunnel Junctions
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Combination of informational storage and logical processing based on an all-oxide asymmetric multiferroic tunnel junction
An asymmetric LSMO/PZT/LTMO multiferroic tunnel junction exhibits combined TMR, TER, and rectification effects that yield four resistive states under opposite biases, enabling co-located quaternary memory and logic functions in device arrays.