Coordinated microarchitectural fixes to Ara close a large fraction of the sustained-throughput gap to an ideal multi-lane chaining model, yielding 1.33× geometric-mean speedup.
Instruction scheduling in the saturn vector unit
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Microarchitectural Co-Optimization for Sustained Throughput of RISC-V Multi-Lane Chaining Vector Processors
Coordinated microarchitectural fixes to Ara close a large fraction of the sustained-throughput gap to an ideal multi-lane chaining model, yielding 1.33× geometric-mean speedup.