Pt/Cu:ZnO/Nb:STO memristive dual port for cache memory applications

· 2020 · DOI 10.1063/5.0016597

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A comprehensive study on ILP acceleration accounting for sparsity, area, energy, data movement using near-memory architecture

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A comparative study on power delivery aspects of compute-in/near-memory approaches using DRAM

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A comprehensive study on ILP acceleration accounting for sparsity, area, energy, data movement using near-memory architecture cs.AR · 2026-05-16 · unreviewed · ref 8
A comparative study on power delivery aspects of compute-in/near-memory approaches using DRAM cs.AR · 2026-04-06 · unreviewed · ref 6
ABI: A tightly integrated, unified, sparsity-aware, reconfigurable, compute near-register file/cache GPU architecture with light-weight softmax for deep learning, linear algebra, and Ising compute cs.AR · 2026-02-15 · unreviewed · ref 23