Dual-sparse LLM decoding can be accelerated by an RLC-CSC spMspV kernel, and a small SIMT-core hardware addition is proposed to remove the remaining index-reconstruction and accumulation bottlenecks.
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Celty: SpMspV GPU Kernel and SIMT Co-Design for Efficient Dual-Sparse LLM Inference
Dual-sparse LLM decoding can be accelerated by an RLC-CSC spMspV kernel, and a small SIMT-core hardware addition is proposed to remove the remaining index-reconstruction and accumulation bottlenecks.