TicToc integrates TIC and TOC DRAM cache organizations with dirty-bit optimizations to deliver 10% speedup over baseline TIC in 4GB DRAM cache evaluations against 3D-XPoint memory while using only 34KB SRAM.
Mempod: A clustered architecture for efficient and scalable migration in flat address space multi-level memories,
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TicToc: Enabling Bandwidth-Efficient DRAM Caching for both Hits and Misses in Hybrid Memory Systems
TicToc integrates TIC and TOC DRAM cache organizations with dirty-bit optimizations to deliver 10% speedup over baseline TIC in 4GB DRAM cache evaluations against 3D-XPoint memory while using only 34KB SRAM.