Wafer-scale three-tier monolithic 3D integration of ALD indium oxide transistors (Fe-FET, E-mode, D-mode) is demonstrated on 200 mm wafers, plus a simulated four-tier CIM design that projects 1.4x to 2.9x speedup over a 2D baseline.
Title resolution pending
1 Pith paper cite this work. Polarity classification is still indexing.
1
Pith paper citing it
fields
physics.app-ph 1years
2026 1verdicts
CONDITIONAL 1representative citing papers
citing papers explorer
-
200 mm Wafer-Scale Monolithic 3D Integration of Atomic Layer-Deposited Oxide Semiconductors
Wafer-scale three-tier monolithic 3D integration of ALD indium oxide transistors (Fe-FET, E-mode, D-mode) is demonstrated on 200 mm wafers, plus a simulated four-tier CIM design that projects 1.4x to 2.9x speedup over a 2D baseline.