A bias-programmable three-nanocryotron gate implements coincidence and odd-parity detection on SNSPD outputs with bit-error rates below 3.2e-2 and drives capacitive loads up to 1.15 V.
Miyajima , author M
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Reconfigurable Superconducting Logic for On-Chip Photon Coincidence Detection
A bias-programmable three-nanocryotron gate implements coincidence and odd-parity detection on SNSPD outputs with bit-error rates below 3.2e-2 and drives capacitive loads up to 1.15 V.