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Liu, S · 2013 · arXiv 2013.22818

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Hardware-Accelerated Event-Graph Neural Networks for Low-Latency Time-Series Classification on SoC FPGA

cs.LG · 2025-03-09 · unverdicted · novelty 5.0

FPGA hardware for event-graph NN achieves 92.7% accuracy on SHD dataset with fewer parameters than SOTA while outperforming prior FPGA SNNs.

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Hardware-Accelerated Event-Graph Neural Networks for Low-Latency Time-Series Classification on SoC FPGA cs.LG · 2025-03-09 · unverdicted · none · ref 9
FPGA hardware for event-graph NN achieves 92.7% accuracy on SHD dataset with fewer parameters than SOTA while outperforming prior FPGA SNNs.

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