RRIP-AOB and ETR enable stateful replacement in 2GB DRAM caches for 18% speedup using <1KB SRAM by reducing state-tracking bandwidth 70%.
System and circuit level power modeling of energy-efficient 12 3d-stacked wide i/o drams,
1 Pith paper cite this work. Polarity classification is still indexing.
1
Pith paper citing it
fields
cs.AR 1years
2019 1verdicts
UNVERDICTED 1representative citing papers
citing papers explorer
-
To Update or Not To Update?: Bandwidth-Efficient Intelligent Replacement Policies for DRAM Caches
RRIP-AOB and ETR enable stateful replacement in 2GB DRAM caches for 18% speedup using <1KB SRAM by reducing state-tracking bandwidth 70%.