Simulation-based analysis shows analog subthreshold neuron circuits and asynchronous AER routing can scale to a 28 nm FD-SOI process, with neuron area near 20 square micrometers and 50 picojoules per spike, though no silicon chip was built.
Neuromorphic electronic circuits for building autonomous cognitive systems,
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Scaling mixed-signal neuromorphic processors to 28 nm FD-SOI technologies
Simulation-based analysis shows analog subthreshold neuron circuits and asynchronous AER routing can scale to a 28 nm FD-SOI process, with neuron area near 20 square micrometers and 50 picojoules per spike, though no silicon chip was built.