A mitigation technique for NBTI aging in multipliers that uses selective 2s complement input transformations to redistribute stress, shown to improve lifetime in systolic arrays with negligible overhead.
A Reliability Evaluation Flow for Assessing the Impact of Permanent Hardware Faults on Integer Arithmetic Circuits,
1 Pith paper cite this work. Polarity classification is still indexing.
1
Pith paper citing it
fields
cs.AR 1years
2026 1verdicts
UNVERDICTED 1representative citing papers
citing papers explorer
-
Building Reliable Arithmetic Multipliers Under NBTI Aging and Process Variations
A mitigation technique for NBTI aging in multipliers that uses selective 2s complement input transformations to redistribute stress, shown to improve lifetime in systolic arrays with negligible overhead.