A technique called cut tracing records the rewrites of MC- and MD-reducing logic synthesis flows in an e-graph, and extracts an FHE circuit traded off between multiplicative depth and multiplicative complexity to lower homomorphic evaluation runtime.
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Cut Tracing with E-Graphs for Boolean FHE Circuit Synthesis
A technique called cut tracing records the rewrites of MC- and MD-reducing logic synthesis flows in an e-graph, and extracts an FHE circuit traded off between multiplicative depth and multiplicative complexity to lower homomorphic evaluation runtime.