SPiME is a parameterized FPGA architecture for parallel AES-128 encryption in processing-in-memory arrays, claiming sub-5% logic utilization at 4096 units and over 25 Gbps throughput.
Very compact fpga implementation of the aes algorithm
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Toward a Lightweight, Scalable, and Parallel Secure Encryption Engine
SPiME is a parameterized FPGA architecture for parallel AES-128 encryption in processing-in-memory arrays, claiming sub-5% logic utilization at 4096 units and over 25 Gbps throughput.