The paper describes an MLP-aware OS scheduling heuristic that alternates high- and low-MLP threads across cores, but provides no quantitative evaluation.
Code Transformations to Improve Memory Parallelism
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MLP Aware Scheduling Techniques in Multithreaded Processors
The paper describes an MLP-aware OS scheduling heuristic that alternates high- and low-MLP threads across cores, but provides no quantitative evaluation.