Clutch accelerates vector-scalar comparisons in PuD systems via chunked temporal coding, delivering 2.9x throughput and 3.0x energy gains over prior bit-serial PuD while also mapping decision tree inference to PuD for the first time.
In-DRAM Bulk Bitwise Execution Engine.arXiv preprint arXiv:1905.09822, 2019
4 Pith papers cite this work. Polarity classification is still indexing.
years
2026 4verdicts
UNVERDICTED 4representative citing papers
PuDGhost causes up to 48% error in SiMRA-based PuD computations due to row and column interference, quantified on 96 real DDR4 chips with proposed mitigations like column screening and row layout changes.
Real-world PIM on UPMEM accelerates cryptographic algorithms when computation is distributed across multiple DRAM ranks, outperforming CPUs at full scale.
Ramulator 2.1 is an updated open-source DRAM simulator adding support for recent memory standards, a Python modeling interface, and enhanced validation workflows.
citing papers explorer
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Clutch: High Performance Vector-Scalar Comparison using DRAM via Chunked Temporal Coding
Clutch accelerates vector-scalar comparisons in PuD systems via chunked temporal coding, delivering 2.9x throughput and 3.0x energy gains over prior bit-serial PuD while also mapping decision tree inference to PuD for the first time.
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PuDGhost: Experimental Analysis of Computation Result Corruption in Processing-using-DRAM Operations on Real DRAM Chips and Implications for Future Systems
PuDGhost causes up to 48% error in SiMRA-based PuD computations due to row and column interference, quantified on 96 real DDR4 chips with proposed mitigations like column screening and row layout changes.
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Taking Cryptography Out of the Data Path via Near-Memory Processing in DRAM
Real-world PIM on UPMEM accelerates cryptographic algorithms when computation is distributed across multiple DRAM ranks, outperforming CPUs at full scale.
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Ramulator 2.1: A Composable Memory System Simulator for Modern DRAM Systems
Ramulator 2.1 is an updated open-source DRAM simulator adding support for recent memory standards, a Python modeling interface, and enhanced validation workflows.