Models clock jitter in ADCs as AR(1) and introduces weighted least-squares and Kalman-filter dejittering algorithms that deliver 1-15 dB SINADR gains in simulations.
Elbornsson,Analysis, Estimation and Compensation of Mismatch Effects in A/D Converters, Ph.D thesis, Department of Electrical En- gineering, Linköping University, 2003
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Autoregressive Stochastic Clock Jitter Compensation in Analog-to-Digital Converters
Models clock jitter in ADCs as AR(1) and introduces weighted least-squares and Kalman-filter dejittering algorithms that deliver 1-15 dB SINADR gains in simulations.