A hardware extension enables deterministic user-level interrupts with over 50x lower worst-case latency at 19% core area and 4.1% power cost.
2005.The 8051/8052 microcontroller: architecture, assem- bly language, and hardware interfacing
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Enabling Deterministic User-Level Interrupts in Real-Time Processors via Hardware Extension
A hardware extension enables deterministic user-level interrupts with over 50x lower worst-case latency at 19% core area and 4.1% power cost.