FEMU, demonstrated as X-HEEP-FEMU on a Zynq SoC, combines FPGA-based hardware prototyping, software virtualization, and silicon-calibrated energy modeling into one platform for TinyAI design exploration.
ASIP design for motion estimation in video com- pression algorithms
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Decoding Alignment: A Critical Survey of LLM Development Initiatives through Value-setting and Data-centric Lens
FEMU, demonstrated as X-HEEP-FEMU on a Zynq SoC, combines FPGA-based hardware prototyping, software virtualization, and silicon-calibrated energy modeling into one platform for TinyAI design exploration.