TRAM achieves up to 27% power reduction in multipliers for CNNs and vision transformers by jointly training model weights and approximate multiplier designs.
Ef- ficient resubstitution-based approximate logic synthesis.IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 44(6):2040–2053
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GTAC applies a generative Transformer with irredundant encoding and self-evolutionary training to produce approximate circuits that cut delay by 30.9% and gate count by 50.5% versus baselines while using far less memory.
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TRAM: Training Approximate Multiplier Structures for Low-Power AI Accelerators
TRAM achieves up to 27% power reduction in multipliers for CNNs and vision transformers by jointly training model weights and approximate multiplier designs.
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GTAC: A Generative Transformer for Approximate Circuits
GTAC applies a generative Transformer with irredundant encoding and self-evolutionary training to produce approximate circuits that cut delay by 30.9% and gate count by 50.5% versus baselines while using far less memory.