NOR IGZO FeFET bitcells scale to 0.016 um2 SRAM-like area and sub-5 ns read latency but incur sensing margin loss from sneak currents unless positive-Vt engineering is applied.
The Ferroelectric MOSFET: A Self -Consistent Quasi-Static Model and its Implications,
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DTCO Exploration of NOR-Type IGZO FeFETs for Read-Dominated Memories
NOR IGZO FeFET bitcells scale to 0.016 um2 SRAM-like area and sub-5 ns read latency but incur sensing margin loss from sneak currents unless positive-Vt engineering is applied.