An FPGA-based neural-network decoder achieves 550 ns deterministic closed-loop latency for real-time distance-3 surface code error correction on a superconducting processor, matching offline decoding performance.
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Neutral-atom processor integrates atom motion with in-place entanglement to cut logical overhead, shown in Shor's variant, CX ladders, and [[16,4,4]] code experiments with 2-8x error improvements.
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Real-time Surface-Code Error Correction Using an FPGA-based Neural-Network Decoder
An FPGA-based neural-network decoder achieves 550 ns deterministic closed-loop latency for real-time distance-3 surface code error correction on a superconducting processor, matching offline decoding performance.
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Demonstration of a Logical Architecture Uniting Motion and In-Place Entanglement
Neutral-atom processor integrates atom motion with in-place entanglement to cut logical overhead, shown in Shor's variant, CX ladders, and [[16,4,4]] code experiments with 2-8x error improvements.