An FPGA accelerator called DTM trains Vanilla and Coalesced Tsetlin Machines on-chip with runtime reconfiguration, reporting higher energy efficiency than prior FPGA training designs.
FINN-R: An End-to-End Deep-Learning Framework for Fast Exploration of Quantized Neural Networks,
1 Pith paper cite this work. Polarity classification is still indexing.
1
Pith paper citing it
fields
cs.AR 1years
2025 1verdicts
CONDITIONAL 1representative citing papers
citing papers explorer
-
Dynamic Tsetlin Machine Accelerators for On-Chip Training at the Edge using FPGAs
An FPGA accelerator called DTM trains Vanilla and Coalesced Tsetlin Machines on-chip with runtime reconfiguration, reporting higher energy efficiency than prior FPGA training designs.