VerCors-relaxed encodes SLR logic to automatically verify weak memory concurrent programs with realistic performance on literature examples.
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cs.LO 2years
2026 2verdicts
UNVERDICTED 2representative citing papers
Predicate subtypes were integrated into VerCors with automatic specification generation, multi-subtype combination support, and a strict mode for overflow checking.
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Deductive Verification of Weak Memory Programs with View-based Protocols (extended version)
VerCors-relaxed encodes SLR logic to automatically verify weak memory concurrent programs with realistic performance on literature examples.
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Predicate Subtypes in VerCors
Predicate subtypes were integrated into VerCors with automatic specification generation, multi-subtype combination support, and a strict mode for overflow checking.