A distributional RL framework with information bottleneck achieves 37-41% better DRAM equalizer performance than baselines, with 51x speedup and uncertainty quantification via Monte Carlo dropout and CVaR.
High speed DRAM transceiver design for low voltage applications with process and temperature variation-aware calibration,
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Distributional Reinforcement Learning with Information Bottleneck for Uncertainty-Aware DRAM Equalization
A distributional RL framework with information bottleneck achieves 37-41% better DRAM equalizer performance than baselines, with 51x speedup and uncertainty quantification via Monte Carlo dropout and CVaR.