SupraSNN introduces a superscalar-inspired SNN accelerator with decoupled synapse and neuron units, multi-cast/merge trees, and partitioning/scheduling that reports 47.6% lower latency and 5.6x better energy efficiency than prior FPGA SNN designs on MNIST and SHD tasks.
A Scalable Multicore Architecture With Heterogeneous Memory Structures for Dynamic Neuromorphic Asynchronous Processors (DYNAPs),
2 Pith papers cite this work. Polarity classification is still indexing.
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UNVERDICTED 2representative citing papers
SAL is a spike-timing-based local learning rule that aligns feedback weights to forward weights in spiking networks by exploiting noise and Hebbian/anti-Hebbian plasticity to recover the true gradient.
citing papers explorer
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SupraSNN: Exploiting Synapse-Level Parallelism in Spiking Neural Network Accelerators through Co-Optimized Mapping and Scheduling
SupraSNN introduces a superscalar-inspired SNN accelerator with decoupled synapse and neuron units, multi-cast/merge trees, and partitioning/scheduling that reports 47.6% lower latency and 5.6x better energy efficiency than prior FPGA SNN designs on MNIST and SHD tasks.
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Spike-based alignment learning solves the weight transport problem
SAL is a spike-timing-based local learning rule that aligns feedback weights to forward weights in spiking networks by exploiting noise and Hebbian/anti-Hebbian plasticity to recover the true gradient.