A single shared AER bus can carry bidirectional address-events with 5 ns direction-switch latency using an asynchronous transceiver block measured in 28 nm FDSOI.
Zamarre \ n o-Ramos, R
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A bi-directional Address-Event transceiver block for low-latency inter-chip communication in neuromorphic systems
A single shared AER bus can carry bidirectional address-events with 5 ns direction-switch latency using an asynchronous transceiver block measured in 28 nm FDSOI.