Introduces Distributed Level-Blocked MPK combining RACE cache blocking with MPI, reporting substantial speedups up to 4x on 832 cores for matrix power kernels across scientific sparse matrices.
In: SC '14: Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis
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GPU implementation of preconditioned s-step CG from 1989 that aggregates operations and overlaps communication with computation for better scalability on Poisson benchmarks.
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Cache Blocking of Distributed-Memory Parallel Matrix Power Kernels
Introduces Distributed Level-Blocked MPK combining RACE cache blocking with MPI, reporting substantial speedups up to 4x on 832 cores for matrix power kernels across scientific sparse matrices.
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Communication-reduced Conjugate Gradient Variants for GPU-accelerated Clusters
GPU implementation of preconditioned s-step CG from 1989 that aggregates operations and overlaps communication with computation for better scalability on Poisson benchmarks.