A nine-transistor current-mode bistable memory cell in 180 nm CMOS is presented with independent tuning of threshold, hysteresis, and gain, shown via schematic simulations for spike-based logic gates and recurrent neural units.
Research progress on solutions to the sneak path issue in memristor crossbar arrays
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A Fully Tunable Ultra-Low Power Current-Mode Memory Cell in Standard CMOS Technology
A nine-transistor current-mode bistable memory cell in 180 nm CMOS is presented with independent tuning of threshold, hysteresis, and gain, shown via schematic simulations for spike-based logic gates and recurrent neural units.