MenTeR is a multi-agent LLM system that claims to automate RF/analog circuit netlist design, achieving 84.2% Pass@1 on a 24-task benchmark, but its self-generated testbench validation is shown to sometimes certify incorrect designs.
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MenTeR: A fully-automated Multi-agenT workflow for end-to-end RF/Analog Circuits Netlist Design
MenTeR is a multi-agent LLM system that claims to automate RF/analog circuit netlist design, achieving 84.2% Pass@1 on a 24-task benchmark, but its self-generated testbench validation is shown to sometimes certify incorrect designs.