A runtime-reconfigurable FPGA accelerator for compressed Tsetlin machines uses fewer logic resources than prior designs and reports up to 129x energy savings versus a microcontroller baseline.
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Runtime Tunable Tsetlin Machines for Edge Inference on eFPGAs
A runtime-reconfigurable FPGA accelerator for compressed Tsetlin machines uses fewer logic resources than prior designs and reports up to 129x energy savings versus a microcontroller baseline.