A dual-mode XNOR/AND bitwise MAC architecture for 8-bit activation, 1-bit weight inference reduces gate count to about 52% of prior designs, alongside binary-weight instance segmentation networks that claim higher Person-category mAP than YOLACT.
A 7nm 4-core AI chip with 25.6TFLOPS hybrid FP8 train- ing, 102.4TOPS INT4 inference and workload-aware throt- tling
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Dedicated Inference Engine and Binary-Weight Neural Networks for Lightweight Instance Segmentation
A dual-mode XNOR/AND bitwise MAC architecture for 8-bit activation, 1-bit weight inference reduces gate count to about 52% of prior designs, alongside binary-weight instance segmentation networks that claim higher Person-category mAP than YOLACT.