A 42M-parameter Conformer ASR model runs on simulated memristor hardware with about 28% relative WER degradation at 3-bit quantization-aware training.
Running Conventional Automatic Speech Recognition on Memristor Hardware: A Simulated Approach
1 Pith paper cite this work. Polarity classification is still indexing.
abstract
Memristor-based hardware offers new possibilities for energy-efficient machine learning (ML) by providing analog in-memory matrix multiplication. Current hardware prototypes cannot fit large neural networks, and related literature covers only small ML models for tasks like MNIST or single word recognition. Simulation can be used to explore how hardware properties affect larger models, but existing software assumes simplified hardware. We propose a PyTorch-based library based on "Synaptogen" to simulate neural network execution with accurately captured memristor hardware properties. For the first time, we show how an ML system with millions of parameters would behave on memristor hardware, using a Conformer trained on the speech recognition task TED-LIUMv2 as example. With adjusted quantization-aware training, we limit the relative degradation in word error rate to 25% when using a 3-bit weight precision to execute linear operations via simulated analog computation.
citation-role summary
citation-polarity summary
fields
cs.LG 1years
2025 1verdicts
CONDITIONAL 1roles
background 1polarities
unclear 1representative citing papers
citing papers explorer
-
Running Conventional Automatic Speech Recognition on Memristor Hardware: A Simulated Approach
A 42M-parameter Conformer ASR model runs on simulated memristor hardware with about 28% relative WER degradation at 3-bit quantization-aware training.