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Hybrid Memristor-CMOS (MeMOS) based Logic Gates and Adder Circuits

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arxiv 1506.06735 v1 pith:XJZJCWQL submitted 2015-06-19 cs.ET

classification cs.ET
keywords logicmemosmemristorcircuitscmosadderarchitecturescircuit
verification ladder T0 review T1 audit T2 compute T3 formal
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Practical memristor came into picture just few years back and instantly became the topic of interest for researchers and scientists. Memristor is the fourth basic two-terminal passive circuit element apart from well known resistor, capacitor and inductor. Recently, memristor based architectures has been proposed by many researchers. In this paper, we have designed a hybrid Memristor-CMOS (MeMOS) logic based adder circuit that can be used in numerous logic computational architectures. We have also analyzed the transient response of logic gates designed using MeMOS logic circuits. MeMOS use CMOS 180 nm process with memristor to compute boolean logic operations. Various parameters including speed, ares, delay and power dissipation are computed and compared with standard CMOS 180 nm logic design. The proposed logic shows better area utilization and excellent results from existing CMOS logic circuits at standard 1.8 V operating voltage.

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