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arxiv: 1907.05205 · v1 · pith:TGUDEDPUnew · submitted 2019-06-30 · 💻 cs.ET · cs.NI· eess.SP

Towards Ultra-low-power Realization of Analog Joint Source-Channel Coding using MOSFETs

Vidyasagar Sadhu , Sanjana Devaraj , Dario Pompili This is my paper

Pith reviewed 2026-05-25 12:34 UTC · model grok-4.3

classification 💻 cs.ET cs.NIeess.SP
keywords analog joint source-channel codingMOSFET encodingultra-low power sensorssignal compressionIoT sensinganalog circuit designquantization levels
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The pith

MOSFET circuits can implement analog joint source-channel coding to compress multiple signals into one with controlled distortion at ultra-low power.

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The paper proposes a MOSFET-based encoding to realize analog joint source-channel coding, a technique that merges two or more signals into a single transmission by quantizing the y-axis while capturing the x-axis continuously. This targets sensing applications like the Internet of Things that need sensors to run without sleeping to avoid losing time and space resolution, while keeping costs low for dense deployment. The design includes a power-efficient way to support multiple quantization levels, letting the digital receiver select the best one and the analog transmitter realize it. Spice and MATLAB simulations confirm the approach maintains efficiency and manages distortion.

Core claim

A novel encoding based on Metal Oxide Semiconductor Field Effect Transistors realizes analog joint source-channel coding by quantizing the y-axis while continuously capturing the x-axis, with a power-efficient circuit design that supports multiple quantization levels chosen by the digital receiver and realized by the analog transmitter, as shown in simulations.

What carries the argument

MOSFET-based analog circuit for joint source-channel coding, which compresses signals by quantizing one axis and continuously encoding the other.

If this is right

  • Sensors can transmit compressed multi-signal data without entering sleep mode, preserving temporal and spatial resolution.
  • The analog transmitter circuit realizes quantization levels selected by the digital receiver.
  • Multiple quantization levels are supported with low power use in the transmitter.
  • High-density low-cost sensor networks become feasible for rapidly changing phenomena.

Where Pith is reading between the lines

These are editorial extensions of the paper, not claims the author makes directly.

  • The circuit approach might scale to compress more than two signals if additional MOSFET stages are added without proportional power increase.
  • Integration into existing IoT nodes could lower total system energy by replacing separate compression and modulation stages.
  • Field tests in variable temperature or voltage conditions would show whether the simulated distortion remains controlled in practice.

Load-bearing premise

The Spice and MATLAB simulations accurately predict real-world MOSFET circuit behavior for power consumption and distortion, with the analog transmitter realizing the chosen quantization levels without unmodeled overheads.

What would settle it

A physical MOSFET transmitter circuit prototype that fails to match the simulated power draw or quantization levels under the same input conditions.

Figures

Figures reproduced from arXiv: 1907.05205 by Dario Pompili, Sanjana Devaraj, Vidyasagar Sadhu.

Figure 1
Figure 1. Figure 1: Shannon mapping realized via output characteristics ( [PITH_FULL_IMAGE:figures/full_fig_p002_1.png] view at source ↗
Figure 2
Figure 2. Figure 2: (a) MOSFET-based encoding for Analog Source-Channel Coding (AJSCC) with different levels of [PITH_FULL_IMAGE:figures/full_fig_p003_2.png] view at source ↗
Figure 3
Figure 3. Figure 3: Spice implementation of precircuit and MOSFET-based encoding in Fig. 2a. Other stages and simple logic generating [PITH_FULL_IMAGE:figures/full_fig_p003_3.png] view at source ↗
Figure 4
Figure 4. Figure 4: (a) Decoding results for φ = 0.5 V when no correction logic is used; (b) Root Mean Square Error (RMSE) of Vgs and Vds before and after correction logic is applied as φ is varied; (c) RMSE (after the correction is applied) of Vgs and Vds as λ is varied for different values of φ. 1 1.5 2 2.5 3 3.5 4 4.5 5 Input to Precircuit, VGS,in [V] 1 1.5 2 2.5 3 3.5 4 4.5 5 Output of Precircuit, VGS,MOS [V] =1 V =0.5 V … view at source ↗
Figure 5
Figure 5. Figure 5: Vgs,in mapped to Vgs,MOS by the precircuit for different φ values. voltages to the MOSFET, the generated Ids values are recorded and sent to the digital receiver (no wireless channel), where the decoding process is done. At the receiver, each curve is processed independently and two consecutive Ids values from the same curve are used for decoding the correct Vgs using the slope-matching technique. The resu… view at source ↗
read the original abstract

Certain sensing applications such as Internet of Things (IoTs), where the sensing phenomenon may change rapidly in both time and space, requires sensors that consume ultra-low power (so that they do not need to be put to sleep leading to loss of temporal and spatial resolution) and have low costs (for high density deployment). A novel encoding based on Metal Oxide Semiconductor Field Effect Transistors (MOSFETs) is proposed to realize Analog Joint Source Channel Coding (AJSCC), a low-complexity technique to compress two (or more) signals into one with controlled distortion. In AJSCC, the y-axis is quantized while the x-axis is continuously captured. A power-efficient design to support multiple quantization levels is presented so that the digital receiver can decide the optimum quantization and the analog transmitter circuit is able to realize that. The approach is verified via Spice and MATLAB simulations.

Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, simulated authors' rebuttal, and a circularity audit. Tearing a paper down is the easy half of reading it; the pith above is the substance, this is the friction.

Referee Report

3 major / 2 minor

Summary. The manuscript proposes a MOSFET-based analog circuit to realize Analog Joint Source-Channel Coding (AJSCC) for ultra-low-power IoT sensing. In this scheme the y-axis is quantized while the x-axis is captured continuously; a power-efficient multi-level design allows the digital receiver to select quantization levels that the analog transmitter then implements. Verification is stated to rest on Spice and MATLAB simulations.

Significance. If the simulation results hold under realistic conditions, the work would offer a concrete, low-cost path to continuous analog compression of multiple sensor signals without digital conversion or sleep cycles, directly addressing power and density constraints in IoT deployments. The use of standard MOSFETs for the encoding function is a practical strength that could enable rapid prototyping.

major comments (3)
  1. [Abstract] Abstract: the claim that the approach is 'verified via Spice and MATLAB simulations' is unsupported because the manuscript supplies no quantitative power-consumption figures, distortion metrics, error bars, or baseline comparisons; without these data the ultra-low-power assertion cannot be evaluated.
  2. [Circuit design section] Circuit-design description: the assertion that the analog transmitter can realize any quantization level chosen by the digital receiver is presented without an explicit accounting of control-signal overhead, settling time, or additional bias current; these factors are load-bearing for the claimed power advantage over digital alternatives.
  3. [Simulation results section] Simulation methodology: the reported Spice/MATLAB results omit process variation, 1/f noise, supply drift, and temperature dependence, all of which directly affect MOSFET threshold voltages and therefore the effective quantization boundaries and power figures at the ultra-low bias currents targeted.
minor comments (2)
  1. [Introduction] Notation for the two-dimensional source and the quantization mapping should be introduced with a single equation or diagram early in the text to avoid repeated verbal descriptions.
  2. [Figures] Figure captions should explicitly state the MOSFET model parameters, supply voltage, and temperature used in each Spice run.

Simulated Author's Rebuttal

3 responses · 0 unresolved

We thank the referee for the constructive comments on our manuscript. We address each major comment point-by-point below, indicating where revisions will be made to strengthen the presentation of our simulation-based results.

read point-by-point responses

  1. Referee: [Abstract] Abstract: the claim that the approach is 'verified via Spice and MATLAB simulations' is unsupported because the manuscript supplies no quantitative power-consumption figures, distortion metrics, error bars, or baseline comparisons; without these data the ultra-low-power assertion cannot be evaluated.

    Authors: We agree that the abstract would be strengthened by explicit reference to quantitative results. The Spice and MATLAB simulations in the manuscript do generate power figures in the nW range, MSE-based distortion metrics, and implicit comparisons to uncompressed transmission. In the revised manuscript we will update the abstract to cite these specific metrics and add error-bar discussion where Monte Carlo runs were performed internally. revision: yes

  2. Referee: [Circuit design section] Circuit-design description: the assertion that the analog transmitter can realize any quantization level chosen by the digital receiver is presented without an explicit accounting of control-signal overhead, settling time, or additional bias current; these factors are load-bearing for the claimed power advantage over digital alternatives.

    Authors: This observation is correct. The present text emphasizes the core MOSFET encoding circuit but does not quantify the overhead of the digital-to-analog control interface. In revision we will insert a dedicated paragraph in the circuit-design section that estimates control-line capacitance, settling time under the target bias currents, and any incremental bias current, thereby allowing a clearer comparison with digital alternatives. revision: yes

  3. Referee: [Simulation results section] Simulation methodology: the reported Spice/MATLAB results omit process variation, 1/f noise, supply drift, and temperature dependence, all of which directly affect MOSFET threshold voltages and therefore the effective quantization boundaries and power figures at the ultra-low bias currents targeted.

    Authors: We acknowledge that the reported results are nominal-device simulations intended to demonstrate functional feasibility. Full statistical analysis of process variation and 1/f noise at these bias levels is computationally heavy and was outside the scope of the initial study. In the revision we will add an explicit limitations paragraph discussing these effects on threshold voltage and quantization boundaries, together with a brief temperature-sweep result if space permits; we therefore treat this as a partial revision. revision: partial

Circularity Check

0 steps flagged

No circularity: forward circuit design proposal verified by external simulation tools

full rationale

The paper proposes a MOSFET-based analog circuit to implement AJSCC encoding and verifies the design via independent Spice and MATLAB simulations. No load-bearing step reduces a claimed prediction or uniqueness result to a fitted parameter, self-citation chain, or definitional renaming. The central claims rest on circuit equations and simulation outputs that are not constructed from the target performance metrics themselves. This is a standard engineering design flow with external verification, not a self-referential derivation.

Axiom & Free-Parameter Ledger

0 free parameters · 1 axioms · 0 invented entities

With only the abstract available, specific free parameters cannot be identified; the design relies on standard MOSFET device models and AJSCC principles without additional invented entities or ad-hoc axioms visible.

axioms (1)
  • domain assumption Standard MOSFET models in Spice simulations sufficiently represent real transistor behavior for power and distortion predictions.
    Verification depends entirely on these models without hardware results.

pith-pipeline@v0.9.0 · 5690 in / 1283 out tokens · 75894 ms · 2026-05-25T12:34:24.862536+00:00 · methodology

discussion (0)

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Reference graph

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