pith. sign in

arxiv: 2103.02651 · v1 · pith:X72NMHECnew · submitted 2021-03-03 · 💻 cs.ET · eess.SP

Experimental Body-input Three-stage DC offset Calibration Scheme for Memristive Crossbar

classification 💻 cs.ET eess.SP
keywords circuitexperimentaloffsetcalibrationcrossbardesignedmemristivescheme
0
0 comments X
read the original abstract

Reading several ReRAMs simultaneously in a neuromorphic circuit increases power consumption and limits scalability. Applying small inference read pulses is a vain attempt when offset voltages of the read-out circuit are decisively more. This paper presents an experimental validation of a three-stage calibration scheme to calibrate the DC offset voltage across the rows of the memristive crossbar. The proposed method is based on biasing the body terminal of one of the differential pair MOSFETs of the buffer through a series of cascaded resistor banks arranged in three stages: coarse, fine and finer stages. The circuit is designed in a 130 nm CMOS technology, where the OxRAM-based binary memristors are built on top of it. A dedicated PCB and other auxiliary boards have been designed for testing the chip. Experimental results validate the presented approach, which is only limited by mismatch and electrical noise.

This paper has not been read by Pith yet.

discussion (0)

Sign in with ORCID, Apple, or X to comment. Anyone can read and Pith papers without signing in.